Power modules have been known which are obtained by housing, within a single package, a half-bridge circuit including two power semiconductor device chips connected in series and an output terminal set at a middle point on their connection (see Patent Literatures 1 and 2). In Patent Literatures 1 and 2, the direction of a principal current which flows through a conductor on the front surface of an insulating plate and the direction of a principal current which flows through a conductor on the back surface of the insulating plate are set opposite to each other. In this way, “close and parallel counterflows” are generated, thus reducing the parasitic inductance in the power module.